Samsung develops first CXL interface based DRAM


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Image: Samsung

Samsung Electronics has developed a new DRAM module based on the Compute Express Link (CXL) interface, something that the company has touted as an industry first.

The CXL-based DDR5 memory module comes in the EDSFF form factor and will enable server systems to scale their memory capacity and bandwidth significantly, the South Korean tech giant claimed.

The new module can scale memory capacity to terabyte levels, reduce system latency caused by memory caching, as well as allow server systems to accelerate their AI, machine learning, and high-performance computing workloads, Samsung added.

The CXL interface was designed to enable high speed and low latency communication between a host processor and other devices such as accelerators, memory buffers and smart I/O, while expanding memory capacity and bandwidth. 

The interface itself was created by the CXL Consortium, which was formed in 2019 to address the memory capacity and bandwidth need of systems that use more processors to process massive volumes of data for applications such as AI. Its members include Intel, Google, Samsung and other global server and chip companies.

According to Samsung, besides the CXL hardware, the new memory also incorporates controller and software technologies such as memory mapping, interface converting, and error management. These will allow the main processors, such as CPUs and GPUs, to recognise the CXL-based memory and utilise it as the main memory.

The new module has been validated on Intel’s new server platforms and Samsung is working with data centre and cloud providers to roll out the module.

Earlier in March, Samsung announced it developed its first DDR5 DRAM.

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